1. Technical Field
This invention relates generally to memory devices, and more particularly, to methods of programming resistive devices
2. Background Art
The volume, use and complexity of computers and electronic devices are continually increasing. Computers consistently become more powerful, new and improved electronic devices are continually developed (e.g., digital audio players, video players). Additionally, the growth and use of digital media (e.g., digital audio, video, images, and the like) have further pushed development of these devices. Such growth and development has vastly increased the amount of information desired/required to be stored and maintained for computer and electronic devices.
Generally, information is stored and maintained in one or more of a number of types of storage devices. Storage devices include long term storage mediums such as, for example, hard disk drives, compact disk drives and corresponding media, digital video disk (DVD) drives, and the like. The long term storage mediums typically store larger amounts of information at a lower cost, but are slower than other types of storage devices. Storage devices also include memory devices, which are often, but not always, short term storage mediums. Memory devices tend to be substantially faster than long term storage mediums. Such memory devices include, for example, dynamic random access memory (DRAM), static random access memory (SRAM), double data rate memory (DDR), flash memory, read only memory (ROM), and the like. Memory devices are subdivided into volatile and non-volatile types. Volatile memory devices generally lose their information if they lose power and typically require periodic refresh cycles to maintain their information. Volatile memory devices include, for example, random access memory (RAM), DRAM, SRAM and the like. Non-volatile memory devices maintain their information whether or not power is maintained to the devices. Non-volatile memory devices include, but are not limited to, ROM, programmable read only memory (PROM), erasable programmable read only memory (EPROM), flash memory and the like. Volatile memory devices generally provide faster operation at a lower cost as compared to non-volatile memory devices.
Memory devices generally include arrays of memory devices. Each memory device can be accessed or “read”, “written”, and “erased” with information. The memory devices maintain information in an “off” or an “on” state, also referred to as “0” and “1”. Typically, a memory device is addressed to retrieve a specified number of byte(s) (e.g., 8 memory devices per byte). For volatile memory devices, the memory devices must be periodically “refreshed” in order to maintain their state. Such memory devices are usually fabricated from semiconductor devices that perform these various functions and are capable of switching and maintaining the two states. The devices are often fabricated with inorganic solid state technology, such as, crystalline silicon devices. A common semiconductor device employed in memory devices is the metal oxide semiconductor field effect transistor (MOSFET).
The use of portable computer and electronic devices has greatly increased demand for non-volatile memory devices. Digital cameras, digital audio players, personal digital assistants, and the like generally seek to employ large capacity non-volatile memory devices (e.g., flash memory, smart media, compact flash, and the like).
Because of the increasing demand for information storage, memory device developers and manufacturers are constantly attempting to increase storage capacity for memory devices (e.g., increase storage per die or chip). A postage-stamp-sized piece of silicon may contain tens of millions of transistors, each transistor as small as a few hundred nanometers. However, silicon-based devices are approaching their fundamental physical size limits. Inorganic solid state devices are generally encumbered with a complex architecture which leads to high cost and a loss of data storage density. The volatile semiconductor memories based on inorganic semiconductor material must constantly be supplied with electric current with a resulting heating and high electric power consumption in order to maintain stored information. Non-volatile semiconductor devices have a reduced data rate and relatively high power consumption and large degree of complexity. Typically, fabrication processes for such cells are also not reliable.
Therefore, there is a need to overcome the aforementioned deficiencies.
FIG. 1 illustrates a type of memory device 30, which includes advantageous characteristics for meeting these needs. The memory device 30 includes an electrode 32 (for example copper), a copper sulfide layer 34 on the electrode 32, an active layer 36 (for example copper oxide), on the layer 34, and an electrode 38 (for example nickel) on the active layer 36. Initially, assuming that the memory device 30 is unprogrammed, in order to program the memory device 30, ground is applied to the electrode 38, while a positive voltage is applied to electrode 32, so that an electrical potential Vpg is applied across the memory device 30 from a higher to a lower electrical potential in the direction from electrode 32 to electrode 38 of the memory device 30 (see FIG. 2, a plot of memory device current vs. electrical potential applied across the memory device 30). This potential is sufficient to cause copper ions to be attracted from the layer 34 toward the electrode 38 and into the active layer 36 (A) so that conductive filaments are formed, causing the active layer 36 (and the overall memory device 30) to be in a low-resistance or conductive state. Upon removal of such potential (B), the ions drawn into the active layer 36 during the programming step remain therein, so that the active layer 36 (and memory device 30) remain in a conductive or low-resistance state.
In the read step of the memory device 30 in its programmed (conductive) state, an electrical potential V, is applied across the memory device 30 from a higher to a lower electrical potential in the direction from electrode to electrode of the memory device 30. This electrical potential is less than the electrical potential Vpg applied across the memory device 30 for programming (see above). In this situation, the memory device 30 will readily conduct current, which indicates that the memory device 30 is in its programmed state.
In order to erase the memory device, a positive voltage is applied to the electrode 38, while the electrode 32 is held at ground, so that an electrical potential Ver (the “erase” electrical potential) is applied across the memory device 30 from a higher to a lower electrical potential in the reverse direction of the memory device 30, i.e., in the direction from electrode to electrode. This potential is sufficient to cause copper ions to be repelled from the active layer 36 toward the electrode 32 and into the layer 34(C), causing the active layer 36 (and the overall memory device 30) to be in a high-resistance or substantially non-conductive state. This state remains upon removal of such potential from the memory device 30.
In the read step of the memory device 30 in its erased (substantially non-conductive) state, the electrical potential Vr is again applied across the memory device 30 from a higher to a lower electrical potential in the direction from electrode to electrode of the memory device 30, as described above. With the active layer 34 (and memory device 30) in a high-resistance or substantially non-conductive state, the memory device 30 will not conduct significant current, which indicates that the memory device 30 is in its erased state.
FIG. 3 illustrates another type of memory device 130, which also includes advantageous characteristics for meeting the needs set forth above. The memory device 130 includes an electrode 132 (for example copper), an insulating layer 134 (for example copper oxide) on the electrode 132, and an electrode 136 (for example titanium/titanium nitride) on the insulating layer 134. Initially, assuming that the memory device 130 is unprogrammed, in order to program the memory device 130, ground is applied to the electrode 132, while a positive voltage is applied to electrode 136, so that an electrical potential Vpg is applied across the memory device 130 from a higher to a lower electrical potential in the direction from electrode 136 to electrode 132. This causes electronic charge carriers in the form of electrons and/or holes to enter the insulating layer 134 and to fill traps contained in layer 134, to provide that the overall memory device 130 is in a conductive, low-resistance (programmed) state (A, FIG. 4). Upon removal of such potential the memory device 130 remains in a conductive or low-resistance state having an on-state resistance illustrated at B.
In the read step of the memory device 30 in its programmed (conductive) state, an electrical potential Vr is applied across the memory device 130 from a higher to a lower electrical potential in the direction from electrode 136 to electrode 132. This electrical potential is less than the electrical potential Vpg applied across the memory device 130 for programming (see above). In this situation, the memory device 130 will readily conduct current, which indicates that the memory device 130 is in its programmed state.
In order to erase the memory device 130, a positive voltage is applied to the electrode 132, while the electrode 136 is held at ground, so that an electrical potential Ver is applied across the memory device 130 from a higher to a lower electrical potential in the direction of from electrode 132 to electrode 136. Application of this electrical potential causes electronic charge carriers to leave the traps in the active layer 134(C), so that the overall memory device 130 is in a high-resistance (erased) state.
In the read step of the memory device 130 in its erased (substantially non-conductive) state, the electrical potential Vr is again applied across the memory device 130 from a higher to a lower electrical potential in the direction from electrode 136 to electrode 132 as described above. With the active layer 134 (and memory device 130) in a high-resistance or substantially non-conductive state, the memory device 130 will not conduct significant current, which indicates that the memory device 130 is in its erased state.
Both the embodiment of FIG. 1 and FIG. 3 have exhibited significant advantages. For example, when a memory device is programmed in the ionic mode (FIGS. 1 and 2), and erase speeds are high while voltage requirements for programming and erasing are low. In addition, the device exhibits high operational endurance, i.e. the device may be switched between programmed and erased states many times without diminishing the operational characteristics of the device. On the other hand, when a memory device is programmed in the electronic charge carrier mode (FIGS. 3 and 4), low programming current is required, and the device exhibits long data retention.
What is needed is an approach to programming a memory device which provides advantages set forth above as needed in a particular environment.